Listar por autor "Huertas Díaz, José Luis"
Mostrando ítems 1-20 de 88
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Artículo
1 V CMOS subthreshold log domain PDM
(Springer, 2003)A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage ...
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Ponencia
1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit
(Institute of Electrical and Electronics Engineers, 1992)A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by ...
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Artículo
10mhz cmos ota-c voltage-controlled quadrature oscillator
(Institution of Engineering and Technology, 1989)A quadrature-type voltage-controlled oscillator with operational transconductance amplifiers and capacitors (OTA-C) is ...
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Artículo
A Chaotic Switched-Capacitor Circuit for 1/f Noise Generation
(Institute of Electrical and Electronics Engineers, 1992)A switched-capacitor circuit is reported for the generation of 1 / fYnoise. The circuit is described by a chaotic first-order ...
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Artículo
A CMOS analog adaptive BAM with on-chip learning and weight refreshing
(Institute of Electrical and Electronics Engineers, 1993)In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural ...
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Ponencia
A CMOS Implementation of Fitzhugh-Nagumo Neuron Model
(Institute of Electrical and Electronics Engineers, 1990)A CMOS circuit is proposed that emulates FitzHugh-Nagumo's differential equations using OTAs, diode connected MOSFETs and ...
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Ponencia
A fuzzy controller using switched-capacitor techniques
(Institute of Electrical and Electronics Engineers, 1993)The use of Switched-Capacitor techniques to build a fuzzy controller is discussed in this contribution. Using a sequential ...
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Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
(Institute of Electrical and Electronics Engineers, 1993)A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
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Artículo
A modular T-mode design approach for analog neural network hardware implementations
(Institute of Electrical and Electronics Engineers, 1992)A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
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Artículo
A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements
(Institute of Electrical and Electronics Engineers, 1988)A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op ...
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Ponencia
A novel CMOS analog neural oscillator cell
(Institute of Electrical and Electronics Engineers, 1989)A very flexible programmable CMOS analog neural oscillator cell architecture is presented. The proposed neuron circuit ...
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Artículo
A Programmable Neural Oscillator Cell
(Institute of Electrical and Electronics Engineers, 1989)A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural ...
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Ponencia
A prototype tool for optimum analog sizing using simulated annealing
(Institute of Electrical and Electronics Engineers, 1992)It is shown that using simulated annealing in combination with electrical simulation provides a powerful tool allowing ...
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A switched-capacitor broadband noise generator for CMOS VLSI
(Institution of Engineering and Technology, 1991)A switched-capacitor circuit is reported for the generation of broadband white noise in MOS VLSI. It is based on the ...
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Ponencia
A Tool for automated design of sigma-delta modulators using statistical optimization
(Institute of Electrical and Electronics Engineers, 1993)A tool is presented which starting from high level specifications of SC σδ modulators (resolution, bandwidth and oversampling ...
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Ponencia
Accurate design of analog CNN in CMOS digital technologies
(Institute of Electrical and Electronics Engineers, 1990)Explores the design of cellular neural networks (CNN) by using sampled-data analog current-mode techniques which neither ...
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Artículo
Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures
(Springer, 2011-01-06)This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the ...
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Ponencia
An advanced symbolic analyzer for the automatic generation of analog circuit design equations
(Institute of Electrical and Electronics Engineers, 1991)A tool for symbolic analysis of analog integrated circuits is presented featuring accurate simplification, pole/zero ...
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Ponencia
Analog integrated neural-like circuits for nonlinear programming
(Institute of Electrical and Electronics Engineers, 1989)A systematic approach for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated ...
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Ponencia
Analog neural networks for real-time constrained optimization
(Institute of Electrical and Electronics Engineers, 1990)Architectures and circuit techniques for implementing general piecewise constrained optimization problems using VLSI ...